Reverse Engineering PCB Board Layout Drawing Common Mistakes

There are some common mistakes in the process of Reverse Engineering PCB Board Layout Drawing,

(1) There is no signal connected to the ERC report pin:

I/O attributes are defined for the pins when the package is created, Inconsistent grid attributes were modified when creating components or placing components on the PCB board, and the pins and wires arrangement in PCB board reverse engineering were not connected;

When creating a component, the pin direction is reversed, and the non-pin name end must be connected; The most common reason is that there is no project file, which is the most common mistake for beginners.

(2) The component went out of the drawing boundary: no component was created in the center of the diagram graphic paper of the component library.

(3) The network table of the created project file from Reverse Engineering PCB Board Layout Drawing can only be partially imported into the PCB: when the net-list of printed circuit board is generated, global is not selected.

(4) When using multi-part components created by yourself, do not use annotate;