Printed Wiring Board Reverse Engineering Element
Elements from Printed Wiring Board Reverse Engineering are supported by several special layers: silk, pins/pads and far-side. silk layer shows the package outline and also holds legend text and element names. The pins/pads layer is used to toggle whether the element’s pins and pads are displayed. far-side layer controls visibility of objects (silkscreen and pads) that are on the far not currently viewed) side of the board after PCB circuit Board Reverse Engineering rules has been checked.
The “oldlib” style of footprint libraries distributed with Pcb rely upon the M4 macro processor. M4 is typically installed under the name m4 on most unix-like operating systems. It is recommended that you use the GNU version of M4 to avoid limitations found in some vendor implementations if the test structure of PCB Board Reverse Engineering can be proceed. See the m4 man page on your system for more information.
Every element file is preprocessed by a user-defined command when the file is read. For details see ‘elementCommand’, Section 6.1 [Resources], page 38. m4, the default value of ‘elementCommand’, allows you to create libraries for package definitions that are shared by all elements. The old element libraries distributed with Pcb expect m4 or an equivalent to be the elementCommand. The new library scheme simply has each element stored in a self-contained file, so there is no need to learn m4 to add to the libraries.
PCB Reverse Engineering can create a list of all connections from one (or all) elements to the others or a list of unconnected pins. It can also verify the layout connections against a netlist file. The element’s ‘layout-name’ is the name used to identify the element in a netlist file (see Section 7.5 [Netlist File], page 60).
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