Clone ATmel Microcontroller AT89C2051 Flash Program
Clone ATmel Microcontroller AT89C2051 Flash Program
Clone ATmel Microcontroller AT89C2051 Flash Program and then transfer the program to other blank AT89C2051, To Program and Verify the Array:
Apply data for flash program byte at location 000H to P1.0 to P1.7.
Raise RST to 12V to enable programming.
Pulse P3.2 once to program a byte in the PEROM array or the lock bits. The byte-write cycle is self-timed and typically takes 1.2 ms.
To verify the programmed data, lower RST from 12V to logic “H” level and set pins P3.3 to P3.7 to the appropriate levels. Output data can be read at the port P1 pins.
To program a byte at the next address location, pulse XTAL1 pin once to advance the internal address counter. Apply new data to the port P1 pins.
Repeat steps 6 through 8, changing data and advancing the address counter for the entire 2K bytes array or until the end of the object file is reached.
Power-off sequence: set XTAL1 to “L” set RST to “L”
Turn VCC power off
Data Polling: The AT89C2051 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written data on P1.7. Once the write cycle has been completed, true data is valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.
Ready/Busy: The Progress of byte programming can also be monitored by the RDY/BSY output signal. Pin P3.1 is pulled low after P3.2 goes High during programming to indicate BUSY. P3.1 is pulled High again when programming is done to indicate READY after Clone ATmel Microcontroller AT89C2051 Flash Program.
Program Verify: If lock bits LB1 and LB2 have not been programmed flash program data can be read back via the data lines for verification:
Reset the internal address counter to 000H by bringing RST from “L” to “H”.
Apply the appropriate control signals for Read flash program data and read the output data at the port P1 pins.
Pulse pin XTAL1 once to advance the internal address counter.
Read the next flash program data byte at the port P1 pins.
Repeat steps 3 and 4 until the entire array is read.
The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.
Chip Erase: The entire PEROM array (2K bytes) and the two Lock Bits are erased electrically by using the proper combination of control signals and by holding P3.2 low for 10 ms. The flash program array is written with all “1”s in the Chip Erase operation and must be executed before any non-blank memory byte can be re-programmed.